An equalizer is a device used in digital communications to minimize the effect of intersymbol interference. This signal interference is often caused by multipath reflections. When a signal is transmitted, it can traverse various different paths to arrive at the receiver. The signal traveling over a line of sight (LOS) path is the first to arrive. Other signals may be reflected one or more times prior to arriving at the receiver and therefore, because the reflective path is longer than the LOS path, the reflected signals arrive after the LOS signal.
The interference caused by multipath reflection can generally be accounted for using a forward filter. A forward filter (e.g. a linear feedforward equalizer (LFE)) is often used to minimize the interference caused by previously received bits on a later received bit. A forward filter can be used to account for the interference caused by the reflected signal as long as the delay between the LOS signal and the reflected signal is less then the span of the LFE. In some environments, such as when transmitting over the ocean or flat ground, a strong reflected signal can be received after a substantial delay. In such cases, a forward filter may not be able to account for the interference caused by the strong delayed reflection. In other words, the window in which the forward filter is effective is not wide enough to encompass the reflected signal because of the length of the delay.
In prior approaches, to account for strong reflected signals received after a substantial delay, a decision feedback equalizer (DFE) has often been used. A decision feedback equalizer, as the name suggests, feeds back decisions regarding the effect of intersymbol interference based on the detected values of a received sequence of bits. As such, a decision feedback equalizer can be used to minimize the interference caused by a reflected signal.
FIG. 1 illustrates a typical representation of a DFE using shift registers. As shown, a DFE 100 includes a symbol detector 101, registers 102a-102n, multipliers 103a-103n, and summer 104. In this specification, although the DFEs are represented as comprising registers and multipliers, it is to be understood that any component (whether hardware, software, or both) capable of performing the functionality described could equally be used.
The received signal, which is generally processed first through a forward filter such as an LFE, is periodically sampled by symbol detector 101 to make a decision as to the value of the symbol at each clock cycle (e.g. the voltage level of a bit). A current decision is stored in register 102a while stored decisions in each register 102a-102n are shifted to the right to the next register. In this manner, a sequence of decisions corresponding to the previously received symbols is stored in registers 102a-102n. Also, at each clock, the decisions, also known as cursors, are input to a multiplier (multipliers 103a-103n) where they are each multiplied by a correction factor known as a tap (tap—1-tap_n). The values of the taps are set so that the multiplied values are appropriate to account for the interference that is likely caused by the decision values on a later symbol. Each of the multiplied values is summed together by summer 104 to yield an equalized value. The equalized value is then fed back to summer 105 where it is added to the received signal to account for the interference on the received signal.
As shown, this process requires the DFE to store decisions and maintain taps for the period over which the DFE is used to account for interference. In other words, if the DFE is calculating the intersymbol interference caused by a sequence of 10 received bit on another bit, the detected values for each of the 10 bits must be stored to calculate and account for this effect on the other bit. As can be seen, as the delay of a reflection increases, the number of registers and multipliers required to account for the interference caused by the delayed reflection equally increases. Accordingly, an adequate DFE can often require excessive circuitry or logic for many applications.